Nvidia's NVHBM base die at TSMC

Samsung will manufacture the base die for NVHBM, a custom HBM product jointly developed with Nvidia, using TSMC's 3nm process, per Seoul Economic Daily citing unnamed industry sources. No company has officially commented. The base die is the logic layer at the bottom of the HBM stack; Nvidia moved its memory controller there to free up compute space on the GPU die. Nvidia requested the TSMC 3nm process and wants a standardized base die across Samsung, SK Hynix, and Micron to maintain consistent performance. The arrangement is described as the first time Samsung and TSMC have collaborated on building HBM itself.

Samsung's own 4nm base die production is limited to portions of Hwaseong Line 17 and Pyeongtaek P3, making it difficult to absorb custom HBM volumes. Samsung Foundry is simultaneously validating an in-house NVHBM base die production plan, and base die production has not been permanently locked to TSMC. Samsung is also testing its own 2nm process as a further fallback. TSMC's 3nm lines, which also produce high-performance computing and smartphone chips, face their own potential ceiling on allocated base die capacity.

To expand 3nm supply, TSMC plans to add two new production lines at Fab 18 in Tainan, with mass production starting in the first half of next year and the first half of 2027, and is also equipping its second Arizona and second Kumamoto fabs with 3nm lines. The result of the current arrangement is that all three major memory makers become buyers of TSMC 3nm logic wafers for every NVHBM stack. Seoul Economic Daily reported the chips boost memory bandwidth by up to 30%. TrendForce projects HBM will account for 30% of the top three DRAM makers' wafer input by end of 2027, up from 18% at end of 2025.

Beyond the base die, Nvidia announced at GTC Berlin that deals with Samsung Electro Mechanics, IBIDEN, and Unimicron will increase its substrate capacity 2.5X over three years. Samsung Electro Mechanics signed what Korean media described as its largest-ever substrate contract with Nvidia, covering substrates for AI chips and networking switches with new dedicated lines in Sejong and Busan. Nvidia is giving KYEC a $1.1 billion advance to build new test facilities in the United States, and Amkor plans to grow interposer capacity in Korea by more than 300% by end of 2028. Samsung Electro Mechanics also entered a 360.5 billion won (~$267 million) long-term deal for package substrates used in memory semiconductors for all of 2027 with an unnamed global customer, described as the first long-term supply agreement Samsung Electro Mechanics has made specifically for package substrates.